Solution:

In Balanced Mode, the SDS collects data received from the serial ports in a packet buffer before sending it on the TCP connection. The packet is sent when a full Ethernet frame is collected (1460 bytes) or when an *approximate* 100ms timeout expires. Also in Balanced Mode, UART FIFOs are employed in both directions. On receive, there can be a delay of up to four character times before the UART generates an interrupt for the SDS to pick up data if the FIFO is not full. When transmitting data out the serial port, the SDS refills the UART's transmit FIFO each time it empties. In Low Latency Mode, all buffering is disabled. The UART generates interrupts on every character, which eliminates FIFO delays at the expense of serial throughput and the risk of receive overruns. On the network side, received serial data is immediately sent on the TCP connection. This eliminates the delay of waiting for the timeout or full buffer condition at the expense of substantially increased packet overhead. In both Balanced and Low Latency Modes, the behavior is fixed. There are no user-adjustable settings beyond the choice between the two modes.